Владислав Китов (редактор отдела Мир)
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How does V86 work at the hardware level? When the VM bit (bit 17) of EFLAGS is set, the processor enters a hybrid state: it is still in protected mode with paging and privilege rings active, but most instructions execute as if the processor were in real mode. Segment addresses are computed as selector
Isaacman also said the agency would halt work to develop a more powerful version of the SLS rocket's upper stage, known as the Exploration Upper Stage, or EUS. Instead, NASA will go forward with a "standardized," less powerful stage but one that will minimize major changes between flights and utilize the same launch gantry.